

{"id":30,"date":"2015-10-23T10:19:04","date_gmt":"2015-10-23T10:19:04","guid":{"rendered":"http:\/\/project.inria.fr\/fm4cps\/?page_id=30"},"modified":"2017-10-13T09:04:59","modified_gmt":"2017-10-13T09:04:59","slug":"publications","status":"publish","type":"page","link":"https:\/\/project.inria.fr\/fm4cps\/publications\/","title":{"rendered":"PUBLICATIONS"},"content":{"rendered":"<p>Publications <strong>co-authored<\/strong> between at least 2 AT partners appear in <strong>bold face<\/strong><\/p>\n<p><strong>2017<\/strong><\/p>\n<p>Proceedings :<\/p>\n<ul>\n<li><strong>F. Mallet, M. Zhang, E. Madelaine<\/strong>: Proc. of the 11th International Conference on the Theoretical Aspects of Sofware Engineering (TASE&#8217;17), IEEE, Sep. 2017, Sophia Antipolis, France.<\/li>\n<\/ul>\n<p>Journals:<\/p>\n<ul>\n<li><strong><strong><em>\u201cPeriodic Scheduling for MARTE\/CCSL: Theory and Practice&#8221;, F. Dai, F. Mallet, M. Zhang, <\/em><\/strong><\/strong>Science of Computer Programming, Oct. 2017.<\/li>\n<li><em><strong>&#8220;Quantitative Performance Evaluation of Uncertainty-Aware Hybrid AADL Designs Using Statistical Model Checking&#8221;<\/strong><strong>. Y. Bao, M. Chen, Q. Zhu, T. Wei, <span class=\"moi\">F. Mallet<\/span> and T. Zhou<\/strong><\/em>. <span class=\"media\">IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems<\/span>, 2017<\/li>\n<li><em><strong>&#8220;TRAP: Trace Runtime Analysis of Properties&#8221;. Daian YUE, Vania JOLOBOFF and Frederic,<\/strong> <\/em>MALLET. Frontiers in Computer Science, Springer, Dec. 2017 (to appear).<\/li>\n<li>&nbsp;\n<p><em><strong>&#8220;A Stochastic Extension to MARTE\/CCSL for Modeling Uncertainty in Cyber Physical Systems&#8221;, Dehui Du, Frederic Mallet<\/strong><\/em>, Science of Computer Progamming, Elsevier, Dec. 2017 (to appear).<\/li>\n<li>&nbsp;\n<p>Xiaosa Hu, Yueling Zhang, Jinawen Li, Geguang Pu, and Min Zhang: On Computing MCS Using Unsatisfiable Reasons. Journal of Software. \u00a0Dec. 2017<\/li>\n<li><em><strong>&#8220;Time Regular Task Automata&#8230;&#8221;, Guoqiang Li and Min Zhang<\/strong><\/em>, submitted to Science of Computer Programming, Oct. 2017<\/li>\n<li>Yue Lv, and Min Zhang The transition and properties from Boolean networks to Discrete-time Markov Chains\uff1aA case study of mice stem cell gene regulatory networks. Journal of East China Normal University (Science) Accepted, Jan, 2018<\/li>\n<li><em>\u201cBehavioural Semantics for Asynchronous Components&#8221;, <\/em>\u00a0Rab\u00e9a Ameur-Boulifa,\u00a0Ludovic Henrio, Oleksandra Kulankhina, Eric Madelaine, Alexandra Savu, JLAMP, DOI: 10.1016\/j.jlamp.2017.02.003, 2017 Feb.<\/li>\n<\/ul>\n<p>Conferences:<\/p>\n<ul>\n<li>&#8220;A Bounded Multi-dimensional Modal Logic for Autonomous Cars Based on Local Traffic and Estimation&#8221;, Bingqing Xu and Qin Li, In proceeding of\u00a0 2017 International\u00a0 Symposium on Theoretical Aspects of\u00a0 Software Engineering (TASE 2017)<\/li>\n<li>&#8220;Bisimulations for Probabilistic Linear Lambda Calculi&#8221;, , Yuxin Deng\u0003 and Yuan FengIn proceeding of\u00a0 2017 International\u00a0 Symposium on Theoretical Aspects of\u00a0 Software Engineering (TASE 2017)<\/li>\n<li>Yueling Zhang, Jianwen Li, Min Zhang, Geguang Pu and Fu Song : Optimizing Backbone Computing. \u00a0\u00a0In proceeding of\u00a0 2017 International\u00a0 Symposium on Theoretical Aspects of\u00a0 Software Engineering (TASE 2017)<\/li>\n<li>Jean-Vivien Millo, Amine Oueslati, Emilien Kaufman, <span class=\"moi\">F. Mallet<\/span> and Robert de Simone. <span class=\"pubtitle\">Explicit Control of Dataflow Graphs with MARTE\/CCSL.<\/span> <span id=\"OBJ_PREFIX_DWT851_com_zimbra_url\" class=\"Object\"><span id=\"OBJ_PREFIX_DWT857_com_zimbra_url\" class=\"Object\"><a href=\"http:\/\/dx.doi.org\/10.5220\/0006269505420549\" target=\"_blank\" rel=\"noopener\"><sup>DOI<\/sup><\/a><\/span><\/span> <span class=\"media\">5th Int. Conf. on Model-Driven Engineering and Software Development (MODELSWARD)<\/span>, pp. <span id=\"OBJ_PREFIX_DWT852_com_zimbra_phone\" class=\"Object\"><a href=\"callto:542-549,%202017\">542-549, 2017<\/a><\/span>, ISBN: <span id=\"OBJ_PREFIX_DWT853_com_zimbra_phone\" class=\"Object\"><a href=\"callto:978-989-758-210-3\">978-989-758-210-3<\/a><\/span>.<\/li>\n<li><em><strong><span class=\"this-person\">Min Zhang<\/span>, <span id=\"OBJ_PREFIX_DWT854_com_zimbra_url\" class=\"Object\"><span id=\"OBJ_PREFIX_DWT858_com_zimbra_url\" class=\"Object\">Yunhui Ying<\/span><\/span>:<\/strong><\/em><span class=\"title\"><em><strong> Towards SMT-based LTL model checking of clock constraint specification language for real-time and embedded systems<\/strong><\/em>.<\/span> <span id=\"OBJ_PREFIX_DWT855_com_zimbra_url\" class=\"Object\"><span id=\"OBJ_PREFIX_DWT859_com_zimbra_url\" class=\"Object\"><a href=\"http:\/\/dblp.uni-trier.de\/db\/conf\/lctrts\/lctes2017.html#ZhangY17\" target=\"_blank\" rel=\"noopener\">LCTES 2017<\/a><\/span><\/span>: 61-70<\/li>\n<\/ul>\n<p>Technical reports:<\/p>\n<ul>\n<li><strong>Eric Madelaine, Xudong Qin, Min Zhang: &#8220;Using SMT engine to generate Symbolic<\/strong><br \/>\n<strong>Automata&#8221;,<\/strong> INRIA Research Report, Nov. 2017<\/li>\n<\/ul>\n<p><strong>2016<\/strong><\/p>\n<p>PhDs:<\/p>\n<ol>\n<li>PhD thesis of <strong>Ling Yin<\/strong> was defended at ECNU (under the joint supervision of Liu Jing and Fr\u00e9d\u00e9ric Mallet) in September 2016.<\/li>\n<li data-canvas-width=\"409.6877202176981\">The PhD thesis of <strong>Oleksandra Kulankhina<\/strong> was defended at University of Nice on 2016 Oct. 14th, entitled \u201c<strong><em>A framework for rigorous development of distributed components:formalisation and tools<\/em><\/strong>\u201d. The VerCors toolset, that results from this work and from several collaborations with ECNU, is available at: https:\/\/team.inria.fr\/scale\/software\/vercors\/<\/li>\n<\/ol>\n<p>Journal:<\/p>\n<ol>\n<li><strong><em>\u201cTowards a bisimulation theory for open synchronized networks of automata\u201d, <\/em>Eric Madelaine, Min Zhang<em>, <\/em><\/strong>Science China, Information Science, Vol.59, Num.5, May 2016<\/li>\n<\/ol>\n<p>Conferences:<\/p>\n<ol>\n<li><strong><em>\u201cTowards a Denotational Semantics for Parameterized Networks of Processes\u201d, <\/em>Siqi Li, Eric Madelaine, Huibiao Zhu, <\/strong>PDP\u201916, Heraklion, March 2016<strong><em><br \/>\n<\/em><\/strong><\/li>\n<li><strong><em>\u201cIntegrated Environment for Verifying and Running Distributed Components\u201d, Ludovic Henrio, Oleksandra Kulankhina, Siqi Li, Eric Madelaine, <\/em><\/strong>FASE, Eindhoven, Apr. 2016<\/li>\n<li><strong><em>\u201cA Denotational Semantics for Parameterized Networks of Processes\u201d, <\/em>Siqi Li, Eric Madelaine, <\/strong>UTP&#8217;16, Reykjavic, June 2016<strong><br \/>\n<\/strong><\/li>\n<li><strong><em>\u201cA theory for the composition of concurrent processes\u201d<\/em>,\u00a0Ludovic Henrio, Eric Madelaine, Min Zhang, <\/strong>FORTE, Heraklion, June 2016.<\/li>\n<li><strong><em>\u201cFlexible Runtime Verification\u201d, <\/em>Daian Yue, Vania Joloboff, Frederic Mallet, <\/strong>FDL\u201916, Bremen, Sept. 2016<strong><br \/>\n<\/strong><\/li>\n<li><strong><em>\u201cMARTE\/pCCSL: Modeling and Refining Stochastic Behaviors of CPSs with Probabilistic Logical Clocks\u201d, <\/em>Dehui Du, Ping Huang, Fr\u00e9d\u00e9ric Mallet, Mingrui Yang, Kaiqiang Jiang, <\/strong>FACS&#8217;16, Besancon, Oct. 2016<\/li>\n<li><strong><em>\u201cDivergence Detection for CCSL Specification via Clock Causality Chain\u201d,<\/em> Qingguo Xu, Robert de Simone, Julien Deantoni, <\/strong>SETTA, Beijing, Nov. 2016<\/li>\n<li><strong><em>\u201c<\/em><span class=\"title\"><em>An SMT-Based Approach to the Formal Analysis of MARTE\/CCSL\u201d<\/em><\/span>, <span id=\"OBJ_PREFIX_DWT622_com_zimbra_url\" class=\"Object\"><span id=\"OBJ_PREFIX_DWT628_com_zimbra_url\" class=\"Object\">Min Zhang<\/span><\/span>, <span id=\"OBJ_PREFIX_DWT623_com_zimbra_url\" class=\"Object\"><span id=\"OBJ_PREFIX_DWT629_com_zimbra_url\" class=\"Object\">Fr\u00e9d\u00e9ric Mallet<\/span><\/span>, <span id=\"OBJ_PREFIX_DWT624_com_zimbra_url\" class=\"Object\"><span id=\"OBJ_PREFIX_DWT630_com_zimbra_url\" class=\"Object\">Huibiao Zhu<\/span><\/span>, <\/strong><span id=\"OBJ_PREFIX_DWT625_com_zimbra_url\" class=\"Object\"><span id=\"OBJ_PREFIX_DWT631_com_zimbra_url\" class=\"Object\">ICFEM 2016<\/span><\/span>, Tokyo, Nov. 2016<\/li>\n<\/ol>\n<p><strong>2015<\/strong><\/p>\n<p>Conferences:<\/p>\n<ol>\n<li><em>A Behavioral Coordination Operator Language (BCOoL)<\/em>,\u00a0 Matias Ezequiel Vara Larsen, Julien Deantoni, Benoit Combemale, Fr\u00e9d\u00e9ric Mallet, Timothy Lethbridge; Jordi Cabot; Alexander Egyed. International Conference on Model Driven Engineering Languages and Systems (MODELS), Sep 2015<\/li>\n<li><strong><em>Modeling Stochastic Behaviors of CPSs with MARTE\/(p)CCSL,<\/em> Dehui Du, Bei Cheng, and Fr\u00e9d\u00e9ric Mallet<\/strong>, accepted for publication.<\/li>\n<li><em>MARTE\/CCSL for Modeling Cyber-Physical Systems,<\/em>\u00a0 Fr\u00e9d\u00e9ric Mallet: SyDe Summer School 2015: 26-49<\/li>\n<li><em>Correctness issues on MARTE\/CCSL constraints<\/em>, Fr\u00e9d\u00e9ric Mallet, Robert de Simone, Science of Computer Programming (SCP) 106: 78-92 (2015)<\/li>\n<li><strong><em>An Executable Semantics of Clock Constraint Specification Language and its Applications<\/em>, Min Zhang and Frederic Mallet<\/strong>:. ICFEM\/FTSCS, CCIS series, Springer, November 2015.<\/li>\n<li><strong><em>\u201cAn Expressive Model for Parameterised Networks of Processes\u201d<\/em>, L. Henrio, E. Madelaine, M. Zhang<\/strong>, in proc. of Parallel, Distributed and network-based Processing (special session PDP4Pad), Turku, Finland, Mar. 2015. Extended version available as RR-8579, INRIA: https:\/\/hal.inria.fr\/hal-01055091v2<\/li>\n<li><em>\u201cPainless support for static and runtime verification of component-based applications\u201d<\/em>, Nuno Gaspar, Ludovic Henrio, Eric Madelaine, in Fundamentals of Software Engineering (FSEN\u20192015), Apr 2015, Teheran, Iran. pp.1. Also: <a href=\"https:\/\/hal.inria.fr\/hal-01168757v1\">https:\/\/hal.inria.fr\/hal-01168757v1<\/a><\/li>\n<li><strong>\u201cTowards Faithful Simulation\u201d Vania Joloboff, Jean Francois Monin, Xiaomu Shi<\/strong>, to appear in Springer LNCS in 2016, paper accepted at SETTA 2015 Symposium in Nanjing, November 2015<\/li>\n<li>\u201c<strong>Fast approximately timed simulation.\u201d Vania Joloboff, Shenpeng Wang, Yangdong Deng<\/strong>. WIT Press, WIT Transactions on Information and Communication Technologies, ISSN: 1743- 3517, March 2015 Modeling and analysis of interactive telemedicine systems<\/li>\n<li>\u201cModeling and analysis of interactive telemedicine systems\u201d. Jing Liu, Xijiao Xiong, Zuohua Ding, Jifeng He, Innovations Syst Softw Eng (2015) 11:55\u201369<\/li>\n<li>\u201cDenotational semantics and its algebraic derivation for an event-driven system-level language\u201d. H. Zhu, Jifeng He, Shengchao Qin and Phillip J. Brooke, Formal Aspects of Computing (2015) 27: 133\u2013166<\/li>\n<li>\u201cEvaluating Energy Consumption for Cyber-Physical Energy System: An Environment Ontology-Based Approach\u201d, \u00a0Xiaohong Chen, Fan Gu, Mingsong Chen, Dehui Du, Jing Liu, Haiying Sun. COMPSAC 2015:<\/li>\n<li><strong>Logical Clock Constraint Specification in PVS. Qingguo Xu, Robert de Simone, Julien Deantoni<\/strong>. Research Report 8748, Inria Sophia Antipolis. 2015, pp.11.<\/li>\n<\/ol>\n<p><strong><span style=\"color: #000000;\">\u00a0<\/span><\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Publications co-authored between at least 2 AT partners appear in bold face 2017 Proceedings : F. Mallet, M. Zhang, E. Madelaine: Proc. of the 11th International Conference on the Theoretical Aspects of Sofware Engineering (TASE&#8217;17), IEEE, Sep. 2017, Sophia Antipolis, France. Journals: \u201cPeriodic Scheduling for MARTE\/CCSL: Theory and Practice&#8221;, F. Dai, F. Mallet, M. Zhang, &hellip; <\/p>\n<p><a class=\"more-link btn\" href=\"https:\/\/project.inria.fr\/fm4cps\/publications\/\">Continue reading<\/a><\/p>\n","protected":false},"author":810,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"open","ping_status":"open","template":"template-onecolumn.php","meta":{"footnotes":""},"class_list":["post-30","page","type-page","status-publish","hentry","nodate","item-wrap"],"_links":{"self":[{"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/pages\/30","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/users\/810"}],"replies":[{"embeddable":true,"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/comments?post=30"}],"version-history":[{"count":22,"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/pages\/30\/revisions"}],"predecessor-version":[{"id":99,"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/pages\/30\/revisions\/99"}],"wp:attachment":[{"href":"https:\/\/project.inria.fr\/fm4cps\/wp-json\/wp\/v2\/media?parent=30"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}