{"id":4,"date":"2011-12-08T11:55:34","date_gmt":"2011-12-08T11:55:34","guid":{"rendered":"http:\/\/project.inria.fr\/template1\/?page_id=4"},"modified":"2018-06-25T10:52:11","modified_gmt":"2018-06-25T08:52:11","slug":"home","status":"publish","type":"page","link":"https:\/\/project.inria.fr\/iplzep\/","title":{"rendered":"Home"},"content":{"rendered":"<p>The ZEP project addresses the issue of designing tiny computing objects with no battery by combining non-volatile memory (NVRAM), energy harvesting, micro-architecture innovations, compiler optimizations, and static analysis. The main application target is Internet of Things (IoT) where small communicating objects will be composed of this computing part associated to a low-power wake-up radio system. The ZEP project gathers four INRIA teams that have a scientific background in architecture, compilation, operating system and low power together with the CEA Lialp and Lisan laboratories of CEA LETI &amp; LIST. The major outcomes of the project will be a prototype harvesting board including NVRAM and the design of a new microprocessor associated with its optimizing compiler and operating system.<\/p>\n<p>You can find the initial detailed description of the project\u00a0 here : <a href=\"https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/ZEP-proposal.pdf\">ZEP-proposal<\/a><\/p>\n<p>&nbsp;<\/p>\n<p><a href=\"https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/TPC-architecture.png\"><img loading=\"lazy\" decoding=\"async\" class=\"size-medium wp-image-87 aligncenter\" src=\"https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/TPC-architecture-300x71.png\" alt=\"\" width=\"300\" height=\"71\" srcset=\"https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/TPC-architecture-300x71.png 300w, https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/TPC-architecture-250x59.png 250w, https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/TPC-architecture-150x36.png 150w, https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/TPC-architecture.png 705w\" sizes=\"auto, (max-width: 300px) 100vw, 300px\" \/><\/a><\/p>\n<p>The scientific work (in progress) is organized around three fields :<\/p>\n<ul>\n<li>a specific NVRAM-based architecture<\/li>\n<li>a dedicated compiler pass that computes a worst-case energy consumption<\/li>\n<li>an operating system managing NVRAM and energy, ensuring memory consistency across power outages<\/li>\n<\/ul>\n<p>The project is illustrated by the figure below, where PACAP, SOCRATE, CORSE, and CAIRN are the teams involved in the project.<\/p>\n<p><a href=\"https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/overview-zep.png\"><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-83 size-medium\" src=\"https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/overview-zep-300x152.png\" alt=\"\" width=\"300\" height=\"152\" srcset=\"https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/overview-zep-300x152.png 300w, https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/overview-zep-768x389.png 768w, https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/overview-zep-250x127.png 250w, https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/overview-zep-150x76.png 150w, https:\/\/project.inria.fr\/iplzep\/files\/2011\/12\/overview-zep.png 812w\" sizes=\"auto, (max-width: 300px) 100vw, 300px\" \/><\/a><\/p>\n<p>Another important goal of the project is to structure the research and innovation that should occur within INRIA to prepare the important technological shift brought by NVRAM technologies.<\/p>\n<p>&nbsp;<\/p>","protected":false},"excerpt":{"rendered":"<p>The ZEP project addresses the issue of designing tiny computing objects with no battery by combining non-volatile memory (NVRAM), energy harvesting, micro-architecture innovations, compiler optimizations, and static analysis. The main application target is Internet of Things (IoT) where small communicating objects will be composed of this computing part associated to\u2026<\/p>\n<p> <a class=\"continue-reading-link\" href=\"https:\/\/project.inria.fr\/iplzep\/\"><span>Continue reading<\/span><i class=\"crycon-right-dir\"><\/i><\/a> <\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"open","template":"","meta":{"footnotes":""},"class_list":["post-4","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/pages\/4","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/comments?post=4"}],"version-history":[{"count":11,"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/pages\/4\/revisions"}],"predecessor-version":[{"id":131,"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/pages\/4\/revisions\/131"}],"wp:attachment":[{"href":"https:\/\/project.inria.fr\/iplzep\/wp-json\/wp\/v2\/media?parent=4"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}