

{"id":65,"date":"2019-06-19T15:31:41","date_gmt":"2019-06-19T13:31:41","guid":{"rendered":"https:\/\/project.inria.fr\/realistic\/?page_id=65"},"modified":"2020-02-13T11:34:00","modified_gmt":"2020-02-13T10:34:00","slug":"publications","status":"publish","type":"page","link":"https:\/\/project.inria.fr\/realistic\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"<p><u>Published<\/u><\/p>\n<p>[1] Mourad HAFIDI, PhD Thesis, &#8220;GPS on stochastic architecture&#8221;, Universit\u00e9 de Bretagne Sud, Novembre 2018. Available on line<\/p>\n<p><a href=\"http:\/\/www-labsticc.univ-ubs.fr\/~boutillon\/articles\/these\/Thesis_M_Hafidhi_2017.pdf\">http:\/\/www-labsticc.univ-ubs.fr\/~boutillon\/articles\/these\/Thesis_M_Hafidhi_2017.pdf<\/a><\/p>\n<p>[2] M. M. Hafidhi and E. Boutillon, &#8220;Improving the Performance of the Carrier Tracking Loop for GPS Receivers in Presence of Transient Errors due to PVT Variations,&#8221; 2016 IEEE International Workshop on Signal Processing Systems (SiPS), Dallas, TX, 2016, pp. 80-85.doi: 10.1109\/SiPS.2016.22 <a href=\"https:\/\/hal.archives-ouvertes.fr\/hal-01391201v1\">https:\/\/hal.archives-ouvertes.fr\/hal-01391201v1<\/a><\/p>\n<p>[3] M. M. Hafidhi, E. Boutillon and C. Winstead, &#8220;Reducing the impact of internal upsets inside the correlation process in GPS Receivers,&#8221; 2015 Conference on Design and Architectures for Signal and Image Processing (DASIP), Krakow, 2015, pp. 1-5. doi: 10.1109\/DASIP.2015.7367264\u00a0\u00a0\u00a0 <a href=\"https:\/\/hal.archives-ouvertes.fr\/hal-01211180v1\">https:\/\/hal.archives-ouvertes.fr\/hal-01211180v1<\/a><\/p>\n<p>[4] M. M. Hafidhi and E. Boutillon, &#8220;Hardware error correction using local syndromes,&#8221; 2017 IEEE International Workshop on Signal Processing Systems (SiPS), Lorient, 2017, pp. 1-6. doi: 10.1109\/SiPS.2017.8109995 <a href=\"https:\/\/hal.archives-ouvertes.fr\/hal-01611117v1\">https:\/\/hal.archives-ouvertes.fr\/hal-01611117v1<\/a><\/p>\n<p>[5] M. Dridi, M. M. Hafidhi, C. Winstead and E. Boutillon, &#8220;Reliable NCO carrier generators for GPS receivers,&#8221; 2015 Conference on Design and Architectures for Signal and Image Processing (DASIP), Krakow, 2015, pp. 1-5. doi: 10.1109\/DASIP.2015.7367266 <a href=\"https:\/\/hal.archives-ouvertes.fr\/hal-01211192v1\">https:\/\/hal.archives-ouvertes.fr\/hal-01211192v1<\/a><\/p>\n<p>[6] M. M. Hafidhi, E. Boutillon and C. Winstead, &#8220;Reliable gold code generators for GPS receivers,&#8221; 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, CO, 2015, pp. 1-4. doi: 10.1109\/MWSCAS.2015.7282164 <a href=\"https:\/\/hal.archives-ouvertes.fr\/hal-01151895v1\">https:\/\/hal.archives-ouvertes.fr\/hal-01151895v1<\/a><\/p>\n<p>[7] I. Wali, E. Casseau, A. Tisserand, \u201cAn Ef\ufb01cient Framework for Design and Assessment of Arithmetic Operators with Reduced-Precision Redundancy\u201d, <em>Conference on Design and Architectures for Signal and Image Processing (DASIP)<\/em>, Dresden, Germany, pp.1-6, September 27-29, 2017. <a href=\"https:\/\/ieeexplore.ieee.org\/document\/8122117\">https:\/\/ieeexplore.ieee.org\/document\/8122117<\/a><\/p>\n<p>[8] P. Dobias, E. Casseau, O. Sinnen, \u201cComparison of Different Methods Making Use of Backup Copies for Fault-Tolerant Scheduling on Embedded Multiprocessor Systems\u201d, <em>Conference on Design and Architectures for Signal and Image Processing (DASIP)<\/em>, Porto, Portugal, pp.1-6, October 10-12, 2018. <a href=\"https:\/\/ieeexplore.ieee.org\/document\/8597044\">https:\/\/ieeexplore.ieee.org\/document\/8597044<\/a><\/p>\n<p>[9] P. Dobias, E. Casseau, O. Sinnen, \u201cRestricted Scheduling Windows for Dynamic Fault-Tolerant Primary\/Backup Approach-Based Scheduling on Embedded Systems\u201d, <em>SCOPES &#8217;18: <\/em><em>21th International Workshop on Software and Compilers for Embedded Systems<\/em>, Sankt Goar, Germany, May 28-30, 2018. <a href=\"https:\/\/dl.acm.org\/citation.cfm?doid=3207719.3207724\">https:\/\/dl.acm.org\/citation.cfm?doid=3207719.3207724<\/a><\/p>\n<p>[10] Nasser, Y., Prevotet, J. C., &amp; H\u00e9lard, M. (2018, May). Power modeling on FPGA: a neural model for RT-level power estimation. In <em>Proceedings of the 15th ACM International Conference on Computing Frontiers<\/em> (pp. 309-313). ACM.<\/p>\n<p>[11] Sara Zermani, Catherine Dezan, Chabha Hireche, Reinhardt Euler, and Jean-Philippe Diguet. Embedded and Probabilistic Health Management for the GPS of Autonomous Vehicles. In 5th Mediterranean Conference on Embedded computing, Bar, Montenegro, June 2016.(MECO Award of &#8220;Gratitude for contribution in scientific and research work&#8221;)<\/p>\n<p>[12] Sara Zermani, Catherine Dezan, Chabha Hireche, Reinhardt Euler, and Jean-Philippe Diguet. Embedded Context aware Diagnosis for a UAV SoC platform. Microprocessors and Microsystems : Embedded Hardware Design (MICPRO), 51 :185\u2013197, June 2017<\/p>\n<p>&nbsp;<\/p>\n<p><u>Dissemination<\/u><\/p>\n<p>[13] M. M. Hafidhi, E. Boutillon and A. Dion, &#8220;Demo: Localisation in a faulty digital GPS receiver,&#8221; 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), Rennes, 2016, pp. 223-224. doi: 10.1109\/DASIP.2016.7853824<\/p>\n<p>[14] Mohamed Hafidhi, Emmanuel Boutillon, \u201cReliable GPS position on an unreliable hardware\u201d, poster, GDR SOCSIP, June 2016, Nantes, France. \u3008https:\/\/colloque-socsip.ietr.fr\/#page=home\u3009<\/p>\n<p>[15] General audience presentation video of CominLab\u2019s RELIASIC project, 2016 (in French):<br \/>\n<a href=\"http:\/\/www-labsticc.univ-ubs.fr\/~boutillon\/un_arch\/reliasic_film.mp4\">http:\/\/www-labsticc.univ-ubs.fr\/~boutillon\/un_arch\/reliasic_film.mp4<\/a><\/p>\n<p>[16] Lab-STICC news about the tape-out of the ASIC circuit: <a href=\"https:\/\/www.labsticc.fr\/en\/news\/1187-cominlabs-reliasic-a-new-circuit-sent-to-foundry.htm\">https:\/\/www.labsticc.fr\/en\/news\/1187-cominlabs-reliasic-a-new-circuit-sent-to-foundry.htm<\/a>.<\/p>\n<p>&nbsp;<\/p>","protected":false},"excerpt":{"rendered":"<p>Published [1] Mourad HAFIDI, PhD Thesis, &#8220;GPS on stochastic architecture&#8221;, Universit\u00e9 de Bretagne Sud, Novembre 2018. Available on line http:\/\/www-labsticc.univ-ubs.fr\/~boutillon\/articles\/these\/Thesis_M_Hafidhi_2017.pdf [2] M. M. Hafidhi and\u2026<\/p>\n<p> <a class=\"continue-reading-link\" href=\"https:\/\/project.inria.fr\/realistic\/publications\/\"><span>Continue reading<\/span><i class=\"crycon-right-dir\"><\/i><\/a> <\/p>\n","protected":false},"author":1611,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-65","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/pages\/65","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/users\/1611"}],"replies":[{"embeddable":true,"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/comments?post=65"}],"version-history":[{"count":3,"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/pages\/65\/revisions"}],"predecessor-version":[{"id":82,"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/pages\/65\/revisions\/82"}],"wp:attachment":[{"href":"https:\/\/project.inria.fr\/realistic\/wp-json\/wp\/v2\/media?parent=65"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}