This project aims at accelerating the R&D efforts in the theory and conception of hardware-efficient fault-tolerant quantum codes. As far as codes are concerned, the project will focus on two of the most promising solutions, namely bosonic codes and Low-Density Parity-Check (LDPC) codes. On the hardware side, the targetted platforms are superconducting qubits and photonic ones. The main goal of the project is to provide a protoype of a cat-qubit-based quantum processor that is fault-tolerant at first order. Then we will move on to demonstrate fault tolerance at order 2 which will pave the way to scaling up our solution towards a Large Scale Quantum (LSQ) computer by the end of the project.

In the photonics realm, different options for scaling up are possible. That is why we will focus on defining and experimentally realizing computational architectures relying on the Measurement-Based Quantum Computation framework and exploiting both cat codes and LDPC codes.

On the LDPC codes topic, our goal is to develop optimal codes in terms of encoding rate and error correction as well as efficient decoding algorithms and LDPC-specific fault-tolerant logical operations. In order to integrate them to photonic- or Rydberg-atom-based thechnologies, we fill focus on developping codes that are as small as possible and that have a limited number of long-range interaction.

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